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    Sr.No Name Organisation Circuit Name GitHub Link
    1 Boddu Ajay Rajiv Gandhi University of Knowledge Technologies, Nuzvid A Low Power Dynamic Bitwidth-Adaptive Multiply Accumulate Unit for TinyML Accelerators using eSim View Repo
    2 Ajay G Nayak NXP Semiconductors Design and Analysis of a Gilbert Cell Mixer View Repo
    3 Vipul Sharma Navia Labs Single Stage Common SourceCascode LNA Design at 1.5 GHz View Repo
    Sr.No Name Organisation Circuit Name GitHub Link
    1 Ashok M Rajalakshmi Institute of Technology Simulation of Quantum Circuits to Detect Water Traces in Post-War Zones View Repo
    2 Kumar Biswajit Rath National Institute of Technology Rourkela Simulation and Performance Evaluation of a Folded Cascode Op-Amp in eSim Environment View Repo
    3 Chinmaya Sharma Indraprastha Institute of Information Technology Delhi 25% Duty Cycle Clock Generator with 50% frequency using eSim View Repo
    4 Chirag Chiranjeevi Manipal Institute of Technology Design and Simulation of a 180nm CMOS Single-Stage Differential Pair  
    5 Digambar praksh wagholika Shri Guru Gobind Singhji Institute of Engineering and Technology, Nanded 12V Battery Charger With Automatic Cut-Off View Repo
    6 Nagaraj Venkatesh Reddy Technische Universität Dresden Bandgap Reference in BiCMOS Process View Repo
    7 Neeraj Rajesh Piralkar COEP Technological University 5-Transistor CMOS Operational Transconductance Amplifier (OTA) View Repo
    8 Om Hajare Indian Institute of Information Technology, Nagpur Current Mirror Using eSim IHP OpenPDK View Repo
    9 Satyajeet Padhy National Institute of Technology, Rourkela 8 - BIT ALU View Repo
    10 Priyanka Dronacharya Group of Institutions A Highly Linear Low Power Envelop Detector  
    11 Rithiv Krishna P Sri Eshwar College of Engineering Buck Converter Using Esim View Repo
    12 Rupawaani K Sri Manakula Vinayagar Engineering College Smart Energy Theft Detection and Prevention System View Repo
    13 Sana BVRIT College of Engineering for Women Neuromorphic Circuit Design: Integrate-and-Fire Neuron with STDP Synapse View Repo
    14 Shrutika Sunil Wadibhasme Yashwantrao Chavhan college of Engineering Full Subtractor Using Nand Gate View Repo
    15 Jyotsana Singh Madan Mohan Malaviya University of Technology Single Phase Full Bridge Inverter With RL Load View Repo
    Sr.No Name Organisation Circuit Name GitHub Link
    1 Catherin Jenira I Rajalakshmi Institute of Technology 8-Input AND Gate Implementation Using 2-Input AND Gates View Repo
    2 Bellana Venkata chaitanya RGUKT Design of Single Precision Floating Point Unit Using eSim View Repo
    3 Sayyam vitalkar Yeshwantrao Chavan College Of Engineering, Nagpur Full Adder Using CMOS View Repo
    4 T.Senthil Kumar Karpagam Academy of Higher Education Design of D Flip Flop Using Cmos Logic View Repo
    Sr.No Name Organisation Circuit Name GitHub Link
    1 Harnoor Singh Khurana Thapar Institute of technology, Patiala Monostable Multivibrator using NE555 and Op-Amp  
    2 Mohd Maaz Quraishi Jamia Millia Islamia 16-bit CORDIC Circuit Design and Simulation View Repo
    3 Sanket Kar Dr.B.C.Roy Engineering College, Durgapur Ring Oscillation View Repo